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EL7156C
EL7156C
High Performance Pin Driver
Features
* Clocking Speeds up to 40MHz * 15ns tr/tf at 2000pF CLOAD * 0.5ns Rise and Fall Times Mismatch * 0.5ns TON-TOFF Prop Delay Mismatch * 3.5pF Typical Input Capacitance * 3.5A Peak Drive * Low on Resistance of 3.5 * High Capacitive Drive Capability * Operates from 4.5V to 18V
General Description
The EL7156C high-performance pin driver with tri-state is suited to many ATE and level-shifting applications. The 3.5A peak drive capability makes this part an excellent choice when driving high capacitance loads. The output pin OUT is connected to input pins VH or VL respectively, depending on the status of the IN pin. When the OE pin is active low, the output is placed in the tri-state mode. The isolation of the output FETs from the power supplies enables VH and VL to be set independently, enabling level-shifting to be implemented. Related to the EL7155C, the EL7156C adds a lower supply pin VS- and makes VL an isolated and independent input. This feature adds applications flexibility and improves switching response due to the increased enhancement of the output FETs. This pin driver has improved performance over existing pin drivers. It is specifically designed to operate at voltages down to 0V across the switch elements while maintaining good speed and on-resistance characteristics. Available in the 8-Pin SOIC and 8-Pin PDIP packages, the EL7156C is specified for operation over the -40C to +85C temperature range.
Applications
* * * * ATE/Burn-in Testers Level Shifting IGBT Drivers CCD Drivers
Ordering Information
Part No. EL7156CN EL7156CS EL7156CS-T7 EL7156CS-T13 Package 8-Pin DIP 8-Pin SOIC 8-Pin SOIC 8-Pin SOIC Tape & Reel 7" 13" Outline # MDP0031 MDP0027 MDP0027 MDP0027
Pin Configuration
VS+ 1 OE 2 IN 3 GND 4 8-Pin PDIP/SOIC L o g i c
8 VH 7 OUT 6 VL 5 VS-
September 5, 2000
(c) 2000 Elantec Semiconductor, Inc.
EL7156C
EL7156C
High Performance Pin Driver
Absolute Maximum Ratings (T
A
= 25C)
Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. +18V Supply Voltage (VS+ to VS-) Input Voltage VS- -0.3V, VS +0.3V Continuous Output Current 200mA
Storage Temperature Range Ambient operating Temperature Operating Junction Temperature Power Dissipation Maximum ESD
-65C to +150C -40C to +85C 125C see curves 2kV
Important Note: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are at the specified temperature and are pulsed tests, therefore: TJ = TC = TA.
Electrical Characteristics
VS+ = +15V, VH = +15V, VL = 0V, VS-=0V, TA = 25C, unless otherwise specified Parameter Input VIH IIH VIL IIL CIN RIN Output ROVH ROVL IOUT IPK IDC Power Supply IS IVH tR tF tRFdelta tD-1 tD-2 tDdelta tD-3 tD-4 Power Supply Current Off Leakage at VH and VL Rise Time Fall Time tR, tF Mismatch Turn-Off Delay Time Turn-On Delay Time tD-1-tD-2 Mismatch Tri-State Delay Enable Tri-State Delay Disable Inputs = VS+ VH, VL = 0V CL =2000 pF CL = 2000 pF CL = 2000 pF CL = 2000 pF CL = 2000 pF CL = 2000 pF 1.3 4 14.5 15 0.5 9.5 10 0.5 10 10 3 10 mA A ns ns ns ns ns ns ns ns ON Resistance VH to OUT ON Resistance VL to OUT Output Leakage Current Peak Output Current (linear resistive operation) Continuous Output Current IOUT = -200 mA IOUT = +200 mA OE = 0V, OUT = VH/VL Source Sink Source/Sink 200 2.7 3.5 0.1 3.5 3.5 4.5 5.5 10 A A A mA Logic `1' Input Voltage Logic `1' Input Current Logic `0' Input Voltage Logic `0' Input Current Input Capacitance Input Resistance VIL = 0V 0.1 3.5 50 VIH = VS+ 2.4 0.1 10 0.8 10 V A V A pF M Description Condition Min Typ Max Units
Switching Characteristics
2
EL7156C
EL7156C
High Performance Pin Driver
Electrical Characteristics
VS+ = +5V, VH = +5V, VL = -5V, VS- = -5V, TA = 25C, unless otherwise specified Parameter Input VIH IIH VIL IIL CIN RIN Output ROVH ROVL IOUT IPK IDC Power Supply IS VH tR tF tRFdelta tD-1 tD-2 tDdelta tD-3 tD-4 Power Supply Current Off Leakage at VH and VL Rise Time Fall Time tR, tF Mismatch Turn-Off Delay Time Turn-On Delay Time tD-1-tD-2 Mismatch Tri-State Delay Enable Tri-State Delay Disable Inputs = VS+ VH, VL = 0V CL = 2000 pF CL = 2000 pF CL = 2000 pF CL = 2000 pF CL = 2000 pF CL = 2000 pF 1 4 17 17 0 11.5 12 0.5 10 10 2.5 10 mA A ns ns ns ns ns ns ns ns ON Resistance VH to OUT ON Resistance VL to OUT Output Leakage Current Peak Output Current (linear resistive operation) Continuous Output Current IOUT = -200 mA IOUT = +200 mA OE = 0V, OUT = VH/VL Source Sink Source/Sink 200 3.4 4 0.1 3.5 3.5 5 6 10 A A A mA Logic `1' Input Voltage Logic `1' Input Current Logic `0' Input Voltage Logic `0' Input Current Input Capacitance Input Resistance VIL = 0V 0.1 3.5 50 VIH = VS+ 2.0 0.1 10 0.8 10 V A V A pF M Description Condition Min Typ Max Units
Switching Characteristics
3
EL7156C
EL7156C
High Performance Pin Driver
Typical Performance Curves
Max Power/Derating Curves 1.8 1W 8-Lead PDIP 800mW Max Power (W) 600mW 8-Lead SO 400mW JA=160C/W 200mW 0 0 25 50 75 Temperature (C) 100 125 150 1.0 5 10 Supply Voltage (V) 15 Max TJ=125C JA=100C/W Input voltage (V) High Threshold 1.6 Hysteresis 1.4 Input Threshold vs Supply Voltage T=25C
1.2
Low Threshold
Quiescent Supply Current vs Supply Voltage T=25C 2.0
6 5 "On" Resistance () 4 3 2 1 0
"On" Resistance vs Supply Voltage IOUT=200mA, T=25C, VS+=VH, VS-=VL=0V VOUT-VL
1.6 Supply Current (mA)
1.2
All Inputs = GND
VOUT-VH
0.8
0.4
All Inputs = VS+
0 5 10 Supply Voltage (V) 15
5
7.5
10 Supply Voltage (V)
12.5
15
30
Rise/Fall Time vs Supply Voltage CL=2000pF, T=25C
20
Rise/Fall Time vs Temperature CL=2000pF, VS+=15V
25 Rise/Fall Time (ns) tR 20 tI 15 tF Rise/Fall Time (ns)
18 tF 16
14 tR 12
10 5 10
tR 15 10 -50 0 50 Temperature (C) 100 150
Supply Voltage (V)
4
EL7156C
EL7156C
High Performance Pin Driver
Typical Performance Curves
Propagation Delay vs Supply Voltage CL=2000pF, T=25C Propagation Delay vs Temperature CL=2000pF, VS+=15V
17
14
15 Delay Time (ns)
12 tD-2 Delay Time (ns) tD-2
13
10 tD-1 8
11
tD-1
9 5 10 Supply Voltage (V) 15
6 -50
-25
0
25
50
75
100
125
Temperature (C)
70 60
Rise/Fall Time vs Load Capacitance VS+=+15V, T=25C
5
Supply Current vs Load Capacitance VS+=VH=15V, VS-=VL=0V, T=25C, f=20kHz
4 Supply Current (mA) Rise/Fall Time (ns) 50 40 tF 30 20 10 0 100 tR
3
2
1
1000 Load Capacitance (pF)
10000
0 100
1000 Load Capacitance (pF)
10000
100
Supply Current vs Frequency CL=1000pF, T=25C
Supply Current (mA)
10
VS+=15V
VS+=10V 1.0 VS+=5V 0.1 10k
100k Frequency (Hz)
1M
10M
5
EL7156C
EL7156C
High Performance Pin Driver
Truth Table
OE 0 0 1 1 IN 0 1 0 1 OUT Tri-state Tri-state VH VL
Operating Voltage Range
PIN GND - VSVS+ - VSVH - VL VS+ - VH VS+ - GND MIN -5 5 -18 0 5 MAX 0 18 18 18 18
Timing Diagram
5V Input 2.5V 0 Inverted Output 90% 10% tD1 tF tD2 tR
Standard Test Configuration
VH VS+ VS+ 10k 4.7 0.1 OE IN GND 1 2 3 4 EL7156C 0.1 4.7 VSL o g i c 8 OUT 7 6 5 4.7 VL 2000p 0.1 4.7
0.1
6
EL7156C
EL7156C
High Performance Pin Driver
Pin Description
Pin 1 2 VS + OE Name Output Enable
VS+
Function Positive Supply Voltage
Equivalent Circuit
INPUT
V SCircuit 1
3 4 5 6 7
IN GND VS VL OUT
Input Ground Negative Supply Voltage Lower Output Voltage Output
Reference Circuit 1
VH
VSVS+ VOUT VSVS-
VL Circuit 2
8
VH
High Output Voltage
7
EL7156C
EL7156C
High Performance Pin Driver
Block Diagram
OE VH
VS+
IN Level Shifter GND 3-State Control OUT
V SVL
Application Information
Product Description
The EL7156C is a high performance 40MHz pin driver. It contains two analog switches connecting VH and VL to OUT. Depending on the value of the IN pin, one of the two switches will be closed and the other switch open. An output enable (OE) is also supplied which opens both switches simultaneously. Due to the topology of the EL7156C, both the VH and VL pins can be connected to any voltage between the VS+ and VS- pins. The EL7156C is available in both the 8-pin SOIC and the 8-pin PDIP packages. The relevant package should b e ch o s en d ep e n d i n g o n t h e ca l c u l at ed p o we r dissipation. All input pins are compatible with both 3V and 5V CMOS signals. With a positive supply (VS+) of 5V, the EL7156C is also compatible with TTL inputs.
Power Supply Bypassing
When using the EL7156C, it is very important to use adequate power supply bypassing. The high switching currents developed by the EL7156C necessitate the use of a bypass capacitor between the supplies (VS+ & VS-) and GND pins. It is recommended that a 2.2F tantalum capacitor be used in parallel with a 0.1F low-inductance ceramic MLC capacitor. These should be placed as close to the supply pins as possible. It is also recommended that the VH and VL pins have some level of bypassing, especially if the EL7156C is driving highly capacitive loads.
Supply Voltage Range and Input Compatibility
The EL7156C is designed for operation on supplies from 5V to 15V (4.5V to 18V maximum). The table on page 6 shows the specifications for the relationship between the VS+, VS-, VH, VL and GND pins.
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads, the EL7156C drive capability is limited by the rise in die temperature brought about by internal power dissipation. For reliable operation die temperature must be kept below Tjmax (125C). It is necessary to calculate the
8
EL7156C
EL7156C
High Performance Pin Driver
power dissipation for a given application prior to selecting the package type. Power dissipation may be calculated:
PD = ( V S x I S ) + ( C INT x V S x f ) + ( C L x V OU T x f )
2 2
where: * Tjmax is the maximum junction temperature (125C), * Tmax is the maximum operating temperature, * PD is the power dissipation calculated above, * ja thermal resistance on junction to ambient. ja is 160C/W for the SO8 package and 100C/W for the PDIP8 package when using a standard JEDEC JESD51-3 single-layer test board. If Tjmax is greater than 125C when calculated using the equation above, then one of the following actions must be taken: * Reduce ja the system by designing more heat-sinking into the PCB (as compared to the standard JEDEC JESD51-3) * Use the PDIP8 instead of the SO8 package * De-rate the application either by reducing the switching frequency, the capacitive load, or the maximum operating (ambient) temperature (Tmax)
where: * VS is the total power supply to the EL7156C (from VS+ to GND), * Vout is the swing on the output (VH - VL), * CL is the load capacitance, * CINT is the internal load capacitance (50pF max.), * IS is the quiescent supply current (3mA max.) and * f is frequency Having obtained the application's power dissipation, a maximum package thermal coefficient may be determined, to maintain the internal die temperature below Tjmax:
T jmax - T max ja = ------------------------------PD
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EL7156C
EL7156C
High Performance Pin Driver
General Disclaimer
Specifications contained in this data sheet are in effect as of the publication date shown. Elantec, Inc. reserves the right to make changes in the circuitry or specifications contained herein at any time without notice. Elantec, Inc. assumes no responsibility for the use of any circuits described herein and makes no representations that they are free from patent infringement.
WARNING - Life Support Policy
September 5, 2000
Elantec Semiconductor, Inc.
675 Trade Zone Blvd. Milpitas, CA 95035 Telephone: (408) 945-1323 (888) ELANTEC Fax: (408) 945-9305 European Office: +44-118-977-6080 Japan Technical Center: +81-45-682-5820
10
Elantec, Inc. products are not authorized for and should not be used within Life Support Systems without the specific written consent of Elantec, Inc. Life Support systems are equipment intended to support or sustain life and whose failure to perform when properly used in accordance with instructions provided can be reasonably expected to result in significant personal injury or death. Users contemplating application of Elantec, Inc. Products in Life Support Systems are requested to contact Elantec, Inc. factory headquarters to establish suitable terms & conditions for these applications. Elantec, Inc.'s warranty is limited to replacement of defective components and does not cover injury to persons or property or other consequential damages.
Printed in U.S.A.

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